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  ? semiconductor components industries, llc, 2001 october, 2001 rev. 8 1 publication order number: sn74ls240/d sn74ls240, sn74ls244 octal buffer/line driver with 3-state outputs the sn74ls240 and sn74ls244 are octal buffers and line drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved pc board density. ? hysteresis at inputs to improve noise margins ? 3-state outputs drive bus lines or buffer memory address registers ? input clamp diodes limit high-speed termination effects guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 4.75 5.0 5.25 v t a operating ambient temperature range 0 25 70 c i oh output current high 3.0 ma o 15 ma i ol output current low 24 ma low power schottky http://onsemi.com pdip20 n suffix case 738 20 1 20 1 x = 0 or 4 a = assembly location wl = wafer lot yy = year ww = work week sn74ls24xn awlyyww marking diagrams ls24x awlyyww soic20 dw suffix case 751d 1 1 20 1 soeiaj20 m suffix case 967 74ls24x awlyww 1 see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information
sn74ls240, sn74ls244 http://onsemi.com 2 logic and connection diagrams dip (top view) 18 17 16 15 14 13 1234 56 7 20 19 8 v cc 1g 2g 1y1 2a4 1y2 1y3 2a3 2a2 1a1 2y4 1a2 2y3 1a3 2y2 1a4 910 2y1 gnd 12 11 1y4 2a1 18 17 16 15 14 13 1234 56 7 20 19 8 v cc 1g 2g 1y1 2a4 1y2 1y3 2a3 2a2 1a1 2y4 1a2 2y3 1a3 2y2 1a4 910 2y1 gnd 12 11 1y4 2a1 sn74ls240 sn74ls244 truth tables sn74ls240 inputs output 1g , 2g d output l l h l h x h l (z) sn74ls244 inputs output 1g , 2g d output l l h l h x l h (z) h = high voltage level l = low voltage level x = immaterial z = high impedance
sn74ls240, sn74ls244 http://onsemi.com 3 dc characteristics over operating temperature range (unless otherwise specified) limits symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 0.8 v guaranteed input low voltage for all inputs v t+ v t hysteresis 0.2 0.4 v v cc = min v ik input clamp diode voltage 0.65 1.5 v v cc = min, i in = 18 ma v oh out p ut high voltage 2.4 3.4 v v cc = min, i oh = 3.0 ma v oh output high voltage 2.0 v v cc = min, i oh = max v ol out p ut low voltage 0.25 0.4 v i ol = 12 ma v cc = v cc min, v in v il or v ih v ol output low voltage 0.35 0.5 v i ol = 24 ma v in = v il or v ih per truth table i ozh output off current high 20 m a v cc = max, v out = 2.7 v i ozl output off current low 20 m a v cc = max, v out = 0.4 v i ih in p ut high current 20 m a v cc = max, v in = 2.7 v i ih input high current 0.1 ma v cc = max, v in = 7.0 v i il input low current 0.2 ma v cc = max, v in = 0.4 v i os output short circuit current (note 1) 40 225 ma v cc = max power supply current total, output high 27 total, output low ls240 44 i cc ls244 46 ma v cc = max total at high z ls240 50 ls244 54 1. not more than one output should be shorted at a time, nor for more than 1 second. ac characteristics (t a = 25 c, v cc = 5.0 v) limits symbol parameter min typ max unit test conditions t plh t phl propagation delay, data to output ls240 9.0 12 14 18 ns t plh t phl propagation delay, data to output ls244 12 12 18 18 ns c l = 45 pf, r l = 667 w t pzh output enable time to high level 15 23 ns r l = 667 w t pzl output enable time to low level 20 30 ns t plz output disable time from low level 15 25 ns c l = 5.0 pf, t phz output disable time from high level 10 18 ns c l = 5 . 0 f , r l = 667 w
sn74ls240, sn74ls244 http://onsemi.com 4 ac waveforms 1.3 v 1.3 v 1.3 v 1.3 v 1.3 v 1.3 v 1.3 v v in v out t plh t phl 1.3 v 1.3 v v in v out sw2 c l * 5 k w sw1 v cc r l to output under test 1.3 v t phl t plh v e v e v out v e v e v out t phz 1.3 v 1.3 v t pzl t plz v ol 1.3 v v oh 0.5 v t pzh 1.3 v figure 1. figure 2. figure 3. figure 4. figure 5. 1.3 v 0.5 v 1.3 v switch positions closed open closed closed open closed closed closed t pzh t pzl t plz t phz sw2 sw1 symbol
sn74ls240, sn74ls244 http://onsemi.com 5 device ordering information device order number package type tape and reel size sn74ls240n pdip20 1440 units/box sn74ls240dw soicwide 38 units/rail sn74ls240dwr2 soicwide 2500/tape and reel sn74ls240m soeiaj20 see note 2 sn74ls240mel soeiaj20 see note 2 sn74ls244n pdip20 1440 units/box sn74ls244dw soicwide 38 units/rail sn74ls244dwr2 soicwide 2500/tape and reel sn74ls244m soeiaj20 see note 2 sn74ls244mel soeiaj20 see note 2 2. for ordering information on the eiaj version of the soic package, please contact your local on semiconductor representative.
sn74ls240, sn74ls244 http://onsemi.com 6 package dimensions n suffix plastic package case 73803 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040   e 1.27 1.77 0.050 0.070 1 11 10 20 a seating plane k n f g d 20 pl t m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc d suffix plastic soic package case 751d05 issue f 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane  h x 45  e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90  0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. 
sn74ls240, sn74ls244 http://onsemi.com 7 package dimensions m suffix soeiaj package case 96701 issue o dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e  10  0  10  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1  c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z
sn74ls240, sn74ls244 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. sn74ls240/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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